PhD thesisMelnikoff, S.J., "Speech recognition in programmable logic," PhD Thesis, University of Birmingham, 2003. Journal letterMelnikoff, S.J. & Quigley, S.F., "Implementing log-add algorithm in hardware," IEE Electronics Letters, 2003, 39, No.12, pp.939-941.Conference papersMelnikoff, S.J., Quigley, S.F. & Russell, M.J., "Implementing a simple continuous speech recognition system on an FPGA," Proc. IEEE Symposium on FPGAs for Custom Computing Machines (FCCM 2002), 2002, pp.275-276. Melnikoff, S.J., Quigley, S.F. & Russell, M.J., "Performing speech recognition on multiple parallel files using continuous hidden Markov models on an FPGA," Proc. IEEE International Conference on Field Programmable Technology (FPT 2002), 2002, pp.399-402.Melnikoff, S.J., Quigley, S.F. & Russell, M.J., "Speech recognition on an FPGA using discrete and continuous hidden Markov models," Proc. 12th International Conference on Field Programmable Logic and Applications (FPL 2002), Lecture Notes in Computer Science #2438, 2002, pp.202-211. Melnikoff, S.J., Quigley, S.F. & Russell, M.J., "Implementing a hidden Markov model speech recognition system in programmable logic," Proc. 11th International Conference on Field Programmable Logic and Applications (FPL 2001), Lecture Notes in Computer Science #2147, 2001, pp.81-90. Melnikoff, S.J., James-Roxby, P.B., Quigley, S.F. & Russell, M.J., "Reconfigurable computing for speech recognition: preliminary findings," Proc. 10th International Conference on Field Programmable Logic and Applications (FPL 2000), Lecture Notes in Computer Science #1896, 2000, pp.495-504. Copyright noticeThesis: © Steve Melnikoff Letter: © IET FPT and FCCM papers: © IEEE All FPL papers: © Springer-Verlag |
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